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article · 2018

A 2.1 pJ/bit, 8 Gb/s Ultra-Low Power In-Package Serial Link Featuring a Time-based Front-end and a Digital Equalizer

An 8 Gb/s time-to-digital converter (TDC) based receiver with a time-based front-end in 65 nm CMOS is specifically designed for in-package serial link applic...

3 citationsDOI: https://doi.org/10.1109/asscc.2018.8579267
A 2.1 pJ/bit, 8 Gb/s Ultra-Low Power In-Package Serial Link Featuring a Time-based Front-end and a Digital Equalizer